1. Field of the Invention
The present invention relates to a discharge display apparatus and a method of driving the same, and more particularly, to a discharge display apparatus having an addressing power recovery circuit and a method of driving the same.
2. Description of the Related Art
A plasma display panel (PDP) as a conventional discharge display panel includes display cells of the plasma display panel. Address electrode lines, dielectric layers, Y-electrode lines, X-electrode lines, a fluorescent layer, partition walls, and an MgO layer as a protection layer are disposed between front and rear glass substrates of a conventional surface-discharge plasma display panel (PDP).
The address electrode lines are formed at a front side of the rear glass substrate in the form of a predetermined pattern. The entire surface of the lower dielectric layer is coated in the front of the address electrode lines. The partition walls are formed at a front side of the lower dielectric layer to be parallel to the address electrode lines. The partition walls partition off a discharge area of each display cell and prevent optical cross-talk between the display cells. The fluorescent layer is formed between the partition walls.
The X-electrode lines and the Y-electrode lines are formed at a rear side of the front glass substrate in the form of a predetermined pattern to be orthogonal to the address electrode lines. A corresponding display cell is formed at cross points of the X-electrode lines and the Y-electrode lines. Each of the X-electrode lines and each of the Y-electrode lines are formed in such a manner that transparent electrode lines formed of a transparent conductive material such as indium tin oxide (ITO) and metallic electrode lines used in improving conductivity are combined with one another. The front dielectric layer is formed in such a manner that the entire surface of the front dielectric layer is coated at rear sides of the X-electrode lines and the Y-electrode lines. The protective layer for protecting the PDP from a strong electric field, for example, an MgO layer is formed in such a manner that the entire surface of the MgO layer is coated at a rear side of the upper dielectric layer. A gas used in forming plasma is sealed in a discharge space.
In a method of driving the conventional PDP, initialization, addressing, and display sustain steps are sequentially performed in a unit sub-field is generally applied to the conventional PDP. In an initialization step, a charge state of display cells to be driven is uniform. In an addressing step, a charge state of display cells to be turned on and a charge state of display cells to be turned off are set. In a display sustain step, display cells to be turned on perform display discharge.
In this case, a plurality of unit sub-fields are included in a unit frame so that a desired gray scale can be displayed in display periods of each sub-field.
A unit frame is divided into eight sub-fields, so as to display a time division gray scale. In addition, each of sub-fields is divided into address fields, and display sustain periods.
In each of the address periods, display data signals having a high level are applied to the address electrode lines, and simultaneously, scan pulses each corresponding to Y-electrode lines are subsequently applied to the address electrode lines. As a result, wall charges are formed by address discharge in a corresponding discharge cell to which the display data signals having a high level are applied, and wall charges are not formed in a discharge cell to which the display data signals having a high level are not applied.
In each of the display sustain periods, display discharge pulses are alternately applied to all the Y-electrode lines and all X-electrode lines so that display discharge occurs in discharge cells in which the wall charges are formed in the corresponding address periods. As such, the brightness of the PDP is proportional to the length of the display sustain periods occupied by the unit frame. The length of the display sustain periods occupied by the unit frame is 255 T (T is a unit time). Thus, the brightness of the PDP may be represented as a 256 gray scale including a case where the brightness has been never displayed in the unit frame.
As a result, by properly selecting a sub-field to be displayed from the eight sub-fields, all 256 gray scales including a zero gray scale that is not displayed at any sub-field may be displayed.
In the address-display separation driving method, since time areas of each of the sub-fields are separated from one another in a unit frame, time areas of address periods and display periods are separated from one another at each of the sub-fields. Thus, it should be waited until another X- and Y-electrode line pairs are addressed after each of X- and Y-electrode line pairs is addressed in the address periods. As such, a time taken for the address periods with respect to each sub-field becomes long and the display periods become short, causing degradation of the brightness of light emitted from a PDP. In order to solve this problem, an address-while-display driving method is well known.
In a conventional address-while-display separation driving method with respect to Y-electrode lines of the PDP, a unit frame is divided into eight sub-fields, so as to display a time division gray scale. In this case, each unit sub-field overlaps based on driven Y-electrode lines and composes a unit frame. Thus, since there are all sub-fields at all time points, an address time slot is set between display discharge pulses, so as to perform each addressing step.
Reset, addressing, and display sustain steps are performed at each sub-field, and a time taken for each sub-field is determined by a display discharge time corresponding to a gray scale. For example, when a 256 gray scale is displayed in units of frames as 8-bit image data and the unit frame (generally, 1/60 second) is comprised of a 255 unit time, a first sub-field driven according to image data of least significant bit (LSB) has a unit time 1(20), a second sub-field has a unit time 2(21), a third sub-field has a unit time 4(22), a fourth sub-field has a unit time 8(23), a fifth sub-field has a unit time 16(24), a sixth sub-field has a unit time 32(25), a seventh sub-field has a unit time 64(26), and an eighth sub-field driven according to image data of the most significant bit (MSB) has a unit time 128(27). That is, since the sum of unit times allocated to each of the sub-fields is a 255 unit time, a 255 gray scale can be displayed, and a 256 gray scale can be displayed including a case where a gray scale that is not display-discharged at any sub-field.
In the conventional discharge display apparatus, a power recovery circuit which recovers driving power of address electrode lines, is provided in each address period. The operational timing of the power recovery circuit is set to be constant. However, the number of display cells to be turned on in each scan time varies, and thus, the capacitance of a discharge display panel varies. As a result, the operational timing of the power recovery circuit is improper for a capacitance of the discharge display panel so that the waveform of an addressing voltage is distorted and consumed power increases.